1. Field
The present art relates to a design aid apparatus, a design aid program and a computer-readable recording medium in which the design aid program is stored that are for aiding logical design of a circuit or a printed board formed by a number of components.
2. Description of the Related Art
In conventional logical design for a circuit and a printed board (hereinafter simply called a circuit) with CAD (Computer Aided Design) system, each component of the circuit is substituted by a symbol in the form of a simple abstract shape (e.g., rectangle) which is different from the actual shape and has terminals equivalent to the actual component and then arrangement and wiring interconnection of the components are determined.
As shown by the example of FIG. 14, conventional CAD system 100 creates symbols representing components that constitute a circuit, registers the created symbols in a library (“LIBRARY” in the drawing) 101 beforehand, and reads symbols from library 101 for designing various circuits.
Specifically, an operator (designer) sets, with an input interface (exemplified by a mouse and/or a keyboard, not shown), component pin information representing attributes of a pin component (logical terminal, hereinafter also called logical pin) such as component pin name, pin exchange group number, input/output classification, output pin attribute, function, polarization, pin code, and open availability with reference to component pin data creating screen 102 displayed on a monitor (not shown) and registers the component pin information into library 101.
Further, the operator determines symbol information including the shape and the pin positions of each symbol as shown by symbol data creating screen 103 with the input interface and registers the created symbol information, in association with the above component pin information, into library 101.
As described above, in a conventional technique, information concerning a symbol to be registered in library 101 has included data that the symbol has which pin at which position, in addition to the shape and the size of the symbol, and the information has been commonly used for logical design of various circuits.
In the event of logical design, symbols have been read from library 101 and used for the logical design (see circuit diagram creating screen 104).
For example, symbols 106-108 that constituting logical circuit (hereinafter simply called circuit) 105 are read from library 101, as shown in FIG. 15. As described above, symbols 106-108 have logical pins whose position has been determined previously. In this example, symbol 106 includes logical pins whose logical pin names are A1-A7 from the top on the left side and logical pins with logical pin names B1-B7 from the top on the right. Symbol 107 includes logical pins with logical pin names J, K RES from the top on the left side and logical pins with logical pin names Q, Q′ from the top on the right side. Similarly, symbol 108 includes logical pins with logical pin names C1 and C2 on from the top the left side and a logical pin with logical pin name C3 on the right side. In addition to those symbols, circuit 105 includes power source 109.
In logical design for some circuit, a wiring process to interconnect logical pins of a number of symbols 106-108 may cause a deficiency of interconnections crossing as shown by the portions enclosed by dotted lines X and Y in FIG. 16. The presence of interconnections crossing complicates the logical circuit diagram, impairing the visibility.
For this reason, since the same component may have various symbol definitions (e.g., the positions of logical pins and a symbol division number) varying with circuit to be designed, the operator preferably creates an optimum symbol each time the corresponding component is used in logical design.
In other words, logical design preferably considers and determines the positions of logical pins of a component symbols and whether or not the symbol is to be divided for each circuit to be design.
However, since registering recent symbols each having hundreds of pins into library 101 burdens the operator with an excessively great amount of load, the conventional technique has used symbols already registered in library 101 for logical circuit even if the symbols have not had proper logical expression (in other words, even if the symbols cause deficiency such as interconnections crossing).
As a solution, a symbol which is not suitable for a circuit to be designed may be corrected and be additionally registered into library 101 (see FIG. 14), but that makes it difficult to manage library 101 and expands the volume of library 101.
There have been proposed techniques of logical design in which a symbol is modified but the modified symbol is not registered into library, which techniques are exemplified by: in layered design of a logical circuit, performing merging and sorting processes based on pin names and pin attributions in order to simplify interconnections of a number of logical circuits on the same layer or different layers, and creating rectangular symbol each of which represents each logical circuit and has logical pins with the pin names arranged on the vertical sides (below Patent Reference 1); modifying a logical symbol extracted from a logical symbol library according to the number of signal line (below Patent Reference 2); and making the size and the reference point of a symbol and the position of pin of the symbol into variations (below Patent Reference 3).
Since these prior techniques disclosed in Patent References 1-3 however determine the number and the position of pins of a symbol which has not been arranged yet, the operator has to determine the number and the positions of the symbol in advance such that the entire logical terminal is not complicated to impair the visibility. These techniques call for experience and capability of an operator and may result in actual symbol arrangement having deficiency such as intersection crossing.
In particular, logical design of a circuit including a symbol with from tens to hundreds of pins or a circuit including a large number of symbols may require repeated determination of the number and the position of pins of a symbol unit until a logical circuit with highly visibility is obtained. Consequently, it is very difficult for previous determination of the pin number and the pin positions to design a highly visible circuit.
[Patent Reference 1] Japanese Patent Application Laid-Open No. HEI 10-134092
[Patent Reference 2] Japanese Patent Application Laid-Open No. HEI 3-121568
[Patent Reference 3] Japanese Patent Application Laid-Open No. HEI 7-44589